1. Field of the Invention
The present invention relates to an electrode manufacturing method.
2. Related Background Art
Recently, a technology for manufacturing a microstructure equal to or less than several tens of nanometers such as a carbon nanotube and a quantum dot on a semiconductor substrate has been developed. For example, B. Q. Wei et al., Nature, Vol. 416, P495 (2002) (hereinafter, referred to as “Non-patent document 1”) discloses a technology for arraying carbon nanotubes on silicon oxide. Ago et al., Appl. Phys. Lett. Vol. 77, P79 (2000) (hereinafter, referred to as “Non-patent document 2”) discloses a technology for manufacturing a carbon nanotube using the CVD method. The carbon tubes disclosed in these documents are, for example, applied to a transistor as disclosed in R. Martel et al., Appl. Phys. Lett. Vol. 73, P2447 (1998) (hereinafter, referred to as “Non-patent document 3”), or used for a field emitter used for an FED (Field Emission Display) disclosed in the non-patent document 2.
G. Springholtz et al., Phys. Rev. Lett. Vol. 84, P4669 (2000) (hereinafter, referred to as “Non-patent document 4”) discloses a method for aligning quantum dots in a self-alignment manner. Further, T. Tanamoto, Physical Review A, Vol. 61, pp022305 (2000) (hereinafter, referred to as “Non-patent document 5”) discloses a quantum bit (qubit) formed by combining two quantum dots of silicon. These quantum dots are used for a single electron element or a quantum computer. The quantum dot is disclosed in Z. h. Yuan et al., Appl. Phys. Lett. Vol. 78, P3127 (2001) (hereinafter, referred to as “Non-patent document 6”).
Generally, in order to provide electrodes with respect to each microstructure less than several tens of nanometers, the electrodes should be positioned with an accuracy less than several nanometers. However, in a conventional lithography technology, it has been impossible to form electrodes in such microstructures with an accuracy less than several nanometers. This is because the wavelength of light in the conventional lithography technology is on the order of micrometers.
For example, it has been impossible to form gate electrodes and drain electrodes with respect to each carbon nanotube arranged in a matrix array at intervals less than several tens of nanometers. Further, in the non-patent document 3, a transistor using a carbon nanotube is disclosed, however, by the technology disclosed in the document, source electrodes and drain electrodes can not be formed with respect to each carbon nanotube. This is a disadvantage in light of high integration of the transistor.
Conventionally, in the case of using the carbon nanotube as a field emitter, gate electrodes can not be formed with respect to each carbon nanotube. Accordingly, by making several tens of carbon nanotubes into a bundle, gate electrodes are formed to the bundles. This is a disadvantage in high integration of the field emitter and miniaturization of the FED.
In a single electron element using quantum dots, for effective action of single electron effect at room temperature, a capacitance between quantum dots is required to be made as small as 10−18 farad. Further, in order to make the single electron element using quantum dots more advantageous than an LSI using a conventional MOS, electrodes are required to be provided with respect to each quantum dot. Further, in the quantum computer disclosed in the non-parent document 5, coherence of wave functions of electrons is important. On this account, the sizes of quantum dots and electrodes are required to be less than several nanometers. However, conventionally, it has been impossible to provide electrodes to such quantum dots, respectively.